AI infrastructure: capex signals, power constraints, and RISC‑V shifts

Weekly issue · 2026-05-16

Macro Pulse

Data centers face a power + hardware squeeze as AI demand persists

AI infrastructure planning is being pulled in two directions at once: demand for compute keeps rising, while the physical constraints around power delivery and data-center operations are tightening. One recurring theme in recent coverage is the “gigascale problem”—extreme training loads create high-frequency fluctuations across the power chain, forcing the industry to think about energy delivery resilience rather than only average power.

At the same time, procurement and spending decisions are getting influenced by hardware timing and pricing. Coverage on infrastructure teams points to prolonged hardware lead times and increased costs tied to AI demand, which is pushing a re-evaluation of IT operational playbooks. A parallel thread is that compute and memory price hikes are flowing through to higher IT spending, even when month-to-month volume trends are uneven.

On the semiconductor side, the capex narrative remains active. TSMC’s record tool orders (along with a capital appropriation announcement) are framed as a potential sign of another capex shockwave, despite mixed signals elsewhere in the cycle. Separately, policy efforts (e.g., SEMI’s push to extend the U.S. Advanced Manufacturing Investment Credit) aim to support domestic semiconductor competitiveness and manufacturing optimization.

Innovation Watch

Energy Efficient Ai

AI systems need to do more work per unit of energy to fit into real-world power limits.
Why now: Energy and power constraints are becoming central design constraints for the next wave of AI data-center buildouts.
Tickers in our universe: AMAT

NVLink / NVSwitch

NVIDIA’s fast chip-to-chip links help many processors coordinate like one larger machine.
Why now: As training and inference scale, interconnect bandwidth and latency materially affect system throughput and efficiency.
Tickers in our universe: NVDA

Custom AI ASICs

Some major AI buyers are designing their own chips to optimize cost and performance for specific workloads.
Why now: The growing shift toward workload-specific accelerators changes how compute spend is allocated across the AI supply chain.
Tickers in our universe: NVDA

Company Spotlight

NVDA — NVLink economics and valuation gap sit at the center of today’s AI infrastructure debate

NVDA leads the composite scoreboard (composite_score: 87.85), with supporting signals across growth, quality, and positioning, and a valuation component that is already reflecting a lot of optimism (valuation_score: 21.9). The reverse-DCF framing provides one way to quantify the tension: implied_growth is 0.25596923828124996 versus model_expected_growth of 0.0861708218782057, leaving a gap of 0.16979841640304427.

That gap matters because recent infrastructure narratives emphasize system-level constraints—power delivery resilience, and the need for efficient interconnect and data movement—rather than only raw chip performance. In that context, innovations like NVLink / NVSwitch connect directly to how clusters behave as systems, not just as collections of accelerators.

If the market is pricing in sustained, above-model growth, the burden is on both platform adoption and the ability to keep energy and performance constraints from becoming bottlenecks. The reverse-DCF gap is the observable summary of that debate. Full thesis behind paywall.

NextFrontier publishes research, not investment advice. Cited from public data. Full thesis pages behind paywall.